Inside Bitcoin

1001; PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL INTEL CORPORATION OR
1002; CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
1003; EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
1004; PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR
1005; PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
1006; LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
1007; NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
1008; SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
1009;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
1010;
1011; Example YASM command lines:
1012; Windows:  yasm -Xvc -f x64 -rnasm -pnasm -o sha256_sse4.obj -g cv8 sha256_sse4.asm
1013; Linux:    yasm -f x64 -f elf64 -X gnu -g dwarf2 -D LINUX -o sha256_sse4.o sha256_sse4.asm
1014;
1015;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
1016;
1017; This code is described in an Intel White-Paper:
1018; "Fast SHA-256 Implementations on Intel Architecture Processors"
1019;
1020; To find it, surf to https://www.intel.com/p/en_US/embedded
1021; and search for that title.
1022; The paper is expected to be released roughly at the end of April, 2012
1023;
1024;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
1025; This code schedules 1 blocks at a time, with 4 lanes per block
1026;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
1027
1028%define MOVDQ movdqu ;; assume buffers not aligned
1029
1030;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; Define Macros
1031
1032; addm [mem], reg
1033; Add reg to mem using reg-mem add and store
1034%macro addm 2
1035    add %2, %1
1036    mov %1, %2
1037%endm
1038
1039;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
1040
1041; COPY_XMM_AND_BSWAP xmm, [mem], byte_flip_mask
1042; Load xmm with mem and byte swap each dword
1043%macro COPY_XMM_AND_BSWAP 3
1044    MOVDQ %1, %2
1045    pshufb %1, %3
1046%endmacro
1047
1048;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
1049
1050%define X0 xmm4
1051%define X1 xmm5
1052%define X2 xmm6
1053%define X3 xmm7
1054
1055%define XTMP0 xmm0
1056%define XTMP1 xmm1
1057%define XTMP2 xmm2
1058%define XTMP3 xmm3
1059%define XTMP4 xmm8
1060%define XFER  xmm9
1061
1062%define SHUF_00BA   xmm10 ; shuffle xBxA -> 00BA
1063%define SHUF_DC00   xmm11 ; shuffle xDxC -> DC00
1064%define BYTE_FLIP_MASK  xmm12
1065
1066%ifdef LINUX
1067%define NUM_BLKS rdx    ; 3rd arg
1068%define CTX rsi ; 2nd arg
1069%define INP rdi ; 1st arg
1070
1071%define SRND    rdi ; clobbers INP
1072%define c   ecx
1073%define d   r8d
1074%define e   edx
1075%else
1076%define NUM_BLKS r8 ; 3rd arg
1077%define CTX rdx     ; 2nd arg
1078%define INP rcx     ; 1st arg
1079
1080%define SRND    rcx ; clobbers INP
1081%define c   edi
1082%define d   esi
1083%define e   r8d
1084
1085%endif
1086%define TBL rbp
1087%define a eax
1088%define b ebx
1089
1090%define f r9d
1091%define g r10d
1092%define h r11d
1093
1094%define y0 r13d
1095%define y1 r14d
1096%define y2 r15d
1097
1098
1099
1100_INP_END_SIZE   equ 8
1101_INP_SIZE   equ 8
1102_XFER_SIZE  equ 8
1103%ifdef LINUX
1104_XMM_SAVE_SIZE  equ 0
1105%else
1106_XMM_SAVE_SIZE  equ 7*16
1107%endif
1108; STACK_SIZE plus pushes must be an odd multiple of 8
1109_ALIGN_SIZE equ 8
1110
1111_INP_END    equ 0
1112_INP        equ _INP_END  + _INP_END_SIZE
1113_XFER       equ _INP      + _INP_SIZE
1114_XMM_SAVE   equ _XFER     + _XFER_SIZE + _ALIGN_SIZE
1115STACK_SIZE  equ _XMM_SAVE + _XMM_SAVE_SIZE
1116
1117; rotate_Xs
1118; Rotate values of symbols X0...X3
1119%macro rotate_Xs 0
1120%xdefine X_ X0
1121%xdefine X0 X1
1122%xdefine X1 X2
1123%xdefine X2 X3
1124%xdefine X3 X_
1125%endm
1126
1127; ROTATE_ARGS
1128; Rotate values of symbols a...h
1129%macro ROTATE_ARGS 0
1130%xdefine TMP_ h
1131%xdefine h g
1132%xdefine g f
1133%xdefine f e
1134%xdefine e d
1135%xdefine d c
1136%xdefine c b
1137%xdefine b a
1138%xdefine a TMP_
1139%endm
1140
1141%macro FOUR_ROUNDS_AND_SCHED 0
1142    ;; compute s0 four at a time and s1 two at a time
1143    ;; compute W[-16] + W[-7] 4 at a time
1144    movdqa  XTMP0, X3
1145    mov y0, e       ; y0 = e
1146    ror y0, (25-11) ; y0 = e >> (25-11)
1147    mov y1, a       ; y1 = a
1148    palignr XTMP0, X2, 4    ; XTMP0 = W[-7]
1149    ror y1, (22-13) ; y1 = a >> (22-13)
1150    xor y0, e       ; y0 = e ^ (e >> (25-11))
1151    mov y2, f       ; y2 = f
1152    ror y0, (11-6)  ; y0 = (e >> (11-6)) ^ (e >> (25-6))
1153    movdqa  XTMP1, X1
1154    xor y1, a       ; y1 = a ^ (a >> (22-13)
1155    xor y2, g       ; y2 = f^g
1156    paddd   XTMP0, X0   ; XTMP0 = W[-7] + W[-16]
1157    xor y0, e       ; y0 = e ^ (e >> (11-6)) ^ (e >> (25-6))
1158    and y2, e       ; y2 = (f^g)&e
1159    ror y1, (13-2)  ; y1 = (a >> (13-2)) ^ (a >> (22-2))
1160    ;; compute s0
1161    palignr XTMP1, X0, 4    ; XTMP1 = W[-15]
1162    xor y1, a       ; y1 = a ^ (a >> (13-2)) ^ (a >> (22-2))
1163    ror y0, 6       ; y0 = S1 = (e>>6) & (e>>11) ^ (e>>25)
1164    xor y2, g       ; y2 = CH = ((f^g)&e)^g
1165    movdqa  XTMP2, XTMP1    ; XTMP2 = W[-15]
1166    ror y1, 2       ; y1 = S0 = (a>>2) ^ (a>>13) ^ (a>>22)
1167    add y2, y0      ; y2 = S1 + CH
1168    add y2, [rsp + _XFER + 0*4] ; y2 = k + w + S1 + CH
1169    movdqa  XTMP3, XTMP1    ; XTMP3 = W[-15]
1170    mov y0, a       ; y0 = a
1171    add h, y2       ; h = h + S1 + CH + k + w
1172    mov y2, a       ; y2 = a
1173    pslld   XTMP1, (32-7)
1174    or  y0, c       ; y0 = a|c
1175    add d, h        ; d = d + h + S1 + CH + k + w
1176    and y2, c       ; y2 = a&c
1177    psrld   XTMP2, 7
1178    and y0, b       ; y0 = (a|c)&b
1179    add h, y1       ; h = h + S1 + CH + k + w + S0
1180    por XTMP1, XTMP2    ; XTMP1 = W[-15] ror 7
1181    or  y0, y2      ; y0 = MAJ = (a|c)&b)|(a&c)
1182    add h, y0       ; h = h + S1 + CH + k + w + S0 + MAJ
1183
1184ROTATE_ARGS
1185    movdqa  XTMP2, XTMP3    ; XTMP2 = W[-15]
1186    mov y0, e       ; y0 = e
1187    mov y1, a       ; y1 = a
1188    movdqa  XTMP4, XTMP3    ; XTMP4 = W[-15]
1189    ror y0, (25-11) ; y0 = e >> (25-11)
1190    xor y0, e       ; y0 = e ^ (e >> (25-11))
1191    mov y2, f       ; y2 = f
1192    ror y1, (22-13) ; y1 = a >> (22-13)
1193    pslld   XTMP3, (32-18)
1194    xor y1, a       ; y1 = a ^ (a >> (22-13)
1195    ror y0, (11-6)  ; y0 = (e >> (11-6)) ^ (e >> (25-6))
1196    xor y2, g       ; y2 = f^g
1197    psrld   XTMP2, 18
1198    ror y1, (13-2)  ; y1 = (a >> (13-2)) ^ (a >> (22-2))
1199    xor y0, e       ; y0 = e ^ (e >> (11-6)) ^ (e >> (25-6))
1200    and y2, e       ; y2 = (f^g)&e
1201    ror y0, 6       ; y0 = S1 = (e>>6) & (e>>11) ^ (e>>25)
1202    pxor    XTMP1, XTMP3
1203    xor y1, a       ; y1 = a ^ (a >> (13-2)) ^ (a >> (22-2))
1204    xor y2, g       ; y2 = CH = ((f^g)&e)^g
1205    psrld   XTMP4, 3    ; XTMP4 = W[-15] >> 3
1206    add y2, y0      ; y2 = S1 + CH
1207    add y2, [rsp + _XFER + 1*4] ; y2 = k + w + S1 + CH
1208    ror y1, 2       ; y1 = S0 = (a>>2) ^ (a>>13) ^ (a>>22)
1209    pxor    XTMP1, XTMP2    ; XTMP1 = W[-15] ror 7 ^ W[-15] ror 18
1210    mov y0, a       ; y0 = a
1211    add h, y2       ; h = h + S1 + CH + k + w
1212    mov y2, a       ; y2 = a
1213    pxor    XTMP1, XTMP4    ; XTMP1 = s0
1214    or  y0, c       ; y0 = a|c
1215    add d, h        ; d = d + h + S1 + CH + k + w
1216    and y2, c       ; y2 = a&c
1217    ;; compute low s1
1218    pshufd  XTMP2, X3, 11111010b    ; XTMP2 = W[-2] {BBAA}
1219    and y0, b       ; y0 = (a|c)&b
1220    add h, y1       ; h = h + S1 + CH + k + w + S0
1221    paddd   XTMP0, XTMP1    ; XTMP0 = W[-16] + W[-7] + s0
1222    or  y0, y2      ; y0 = MAJ = (a|c)&b)|(a&c)
1223    add h, y0       ; h = h + S1 + CH + k + w + S0 + MAJ
1224
1225ROTATE_ARGS
1226    movdqa  XTMP3, XTMP2    ; XTMP3 = W[-2] {BBAA}
1227    mov y0, e       ; y0 = e
1228    mov y1, a       ; y1 = a
1229    ror y0, (25-11) ; y0 = e >> (25-11)
1230    movdqa  XTMP4, XTMP2    ; XTMP4 = W[-2] {BBAA}
1231    xor y0, e       ; y0 = e ^ (e >> (25-11))
1232    ror y1, (22-13) ; y1 = a >> (22-13)
1233    mov y2, f       ; y2 = f
1234    xor y1, a       ; y1 = a ^ (a >> (22-13)
1235    ror y0, (11-6)  ; y0 = (e >> (11-6)) ^ (e >> (25-6))
1236    psrlq   XTMP2, 17   ; XTMP2 = W[-2] ror 17 {xBxA}
1237    xor y2, g       ; y2 = f^g
1238    psrlq   XTMP3, 19   ; XTMP3 = W[-2] ror 19 {xBxA}
1239    xor y0, e       ; y0 = e ^ (e >> (11-6)) ^ (e >> (25-6))
1240    and y2, e       ; y2 = (f^g)&e
1241    psrld   XTMP4, 10   ; XTMP4 = W[-2] >> 10 {BBAA}
1242    ror y1, (13-2)  ; y1 = (a >> (13-2)) ^ (a >> (22-2))
1243    xor y1, a       ; y1 = a ^ (a >> (13-2)) ^ (a >> (22-2))
1244    xor y2, g       ; y2 = CH = ((f^g)&e)^g
1245    ror y0, 6       ; y0 = S1 = (e>>6) & (e>>11) ^ (e>>25)
1246    pxor    XTMP2, XTMP3
1247    add y2, y0      ; y2 = S1 + CH
1248    ror y1, 2       ; y1 = S0 = (a>>2) ^ (a>>13) ^ (a>>22)
1249    add y2, [rsp + _XFER + 2*4] ; y2 = k + w + S1 + CH
1250    pxor    XTMP4, XTMP2    ; XTMP4 = s1 {xBxA}